118 lines
5.1 KiB
C
118 lines
5.1 KiB
C
#ifndef _REG_DMACHCFG_H_
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#define _REG_DMACHCFG_H_
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#include "reg_base.h"
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//================================
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//BLOCK DMACHCFG define
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#define DMACHCFG_BASE ((uint32_t)0x40027000)
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#define DMACHCFG_IFLAG0_ADDR_OFFSET 0x000
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#define DMACHCFG_IFLAG1_ADDR_OFFSET 0x004
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#define DMACHCFG_ISFR0_ADDR_OFFSET 0x008
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#define DMACHCFG_ISFR1_ADDR_OFFSET 0x00c
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#define DMACHCFG_ICFR0_ADDR_OFFSET 0x010
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#define DMACHCFG_ICFR1_ADDR_OFFSET 0x014
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#define DMACHCFG_IEFR0_ADDR_OFFSET 0x018
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#define DMACHCFG_IEFR1_ADDR_OFFSET 0x01c
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#define DMACHCFG_CHSEL0_CONTAIN_ADDR_OFFSET 0x100
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#define DMACHCFG_CHSEL1_CONTAIN_ADDR_OFFSET 0x104
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//================================
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//BLOCK DMACHCFG reg struct define
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typedef union //0x100
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{
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struct
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{
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uint32_t CH0_SEL: 6; // bit[5:0]
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uint32_t RSV_NOUSE1: 2; // bit[7:6] --- Ignore me
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uint32_t CH1_SEL: 6; // bit[13:8]
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uint32_t RSV_NOUSE2: 2; // bit[15:14]-- Ignore me
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uint32_t CH2_SEL: 6; // bit[21:16]
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uint32_t RSV_NOUSE3: 2; // bit[23:22]-- Ignore me
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uint32_t CH3_SEL: 6; // bit[29:24]
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uint32_t RSV_END: 2; // bit[31:30]
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};
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uint32_t Word;
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} DMACHCFG_CHSEL0_CONTAIN_TypeDef; //0x100
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//================================
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#define DMACHCFG_CH0_SEL_LSB 0
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#define DMACHCFG_CH0_SEL_WIDTH 6
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#define DMACHCFG_CH1_SEL_LSB 8
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#define DMACHCFG_CH1_SEL_WIDTH 6
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#define DMACHCFG_CH2_SEL_LSB 16
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#define DMACHCFG_CH2_SEL_WIDTH 6
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#define DMACHCFG_CH3_SEL_LSB 24
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#define DMACHCFG_CH3_SEL_WIDTH 6
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//================================
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typedef union //0x104
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{
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struct
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{
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uint32_t CH4_SEL: 6; // bit[5:0]
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uint32_t RSV_NOUSE1: 2; // bit[7:6] --- Ignore me
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uint32_t CH5_SEL: 6; // bit[13:8]
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uint32_t RSV_NOUSE2: 2; // bit[15:14]-- Ignore me
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uint32_t CH6_SEL: 6; // bit[21:16]
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uint32_t RSV_NOUSE3: 2; // bit[23:22]-- Ignore me
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uint32_t CH7_SEL: 6; // bit[29:24]
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uint32_t RSV_END: 2; // bit[31:30]
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};
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uint32_t Word;
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} DMACHCFG_CHSEL1_CONTAIN_TypeDef; //0x104
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//================================
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#define DMACHCFG_CH4_SEL_LSB 0
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#define DMACHCFG_CH4_SEL_WIDTH 6
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#define DMACHCFG_CH5_SEL_LSB 8
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#define DMACHCFG_CH5_SEL_WIDTH 6
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#define DMACHCFG_CH6_SEL_LSB 16
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#define DMACHCFG_CH6_SEL_WIDTH 6
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#define DMACHCFG_CH7_SEL_LSB 24
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#define DMACHCFG_CH7_SEL_WIDTH 6
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//================================
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//================================
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//BLOCK DMACHCFG top struct define
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typedef struct
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{
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__I uint32_t IFLAG0 ; // 0x000,
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// dma interupt flag
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__I uint32_t IFLAG1 ; // 0x004,
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// dma err flag
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__IO uint32_t ISFR0 ; // 0x008,
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// no use
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__IO uint32_t ISFR1 ; // 0x00c,
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// no use
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__O uint32_t ICFR0 ; // 0x010,
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// clear dma channel interupt
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__O uint32_t ICFR1 ; // 0x014,
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// clear dma interupt error flag
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__IO uint32_t IEFR0 ; // 0x018,
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// enable dma channel[x] interupt
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__IO uint32_t IEFR1 ; // 0x01c,
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// enable dma error interrupt
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__I uint32_t RSV0[56] ;
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union
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{
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__IO uint32_t CHSEL[2];
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struct
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{
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__IO DMACHCFG_CHSEL0_CONTAIN_TypeDef CHSEL0_CONTAIN ; // 0x100,
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// include channel(0~3)
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__IO DMACHCFG_CHSEL1_CONTAIN_TypeDef CHSEL1_CONTAIN ; // 0x104,
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// include channel(4~7)
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};
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};
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} DMACHCFG_TypeDef;
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#define DMACHCFG (( DMACHCFG_TypeDef *) DMACHCFG_BASE)
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#endif
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