146 lines
3.4 KiB
C
146 lines
3.4 KiB
C
/**
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****************************************************************************************
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*
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* @file main.c
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*
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* @brief Main Entry of the application.
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*
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****************************************************************************************
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*/
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#include "b6x.h"
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#include "drvs.h"
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#include "regs.h"
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#include "dbg.h"
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/*
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* DEFINES
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****************************************************************************************
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*/
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#define PA_RET_SEE1 (2)
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#define PA_RET_SEE2 (3)
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#define PA_SOFT_PWM (4)
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#if (CTMR_USED)
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#define PWC_TMR (PWM_CTMR)
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#define PWC_TMR_CH(n) (PWM_CTMR_CH##n)
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#define PWC_IRQc (CTMR_IRQn)
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#define PA_PWC_CH1 (15)
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#define PA_PWC_CH2 (16)
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#else
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#define PWC_TMR (PWM_ATMR)
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#define PWC_TMR_CH(n) (PWM_ATMR_CH##n##P)
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#define PWC_IRQc (ATMR_IRQn)
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#define PA_PWC_CH1 (7)
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#define PA_PWC_CH2 (8)
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#endif
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#define TIMER_INT_CH1_BIT (0x02U)
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#define TIMER_INT_CH2_BIT (0x04U)
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#define TIMER_INT_CH3_BIT (0x08U)
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#define TIMER_INT_CH4_BIT (0x10U)
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/*
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* FUNCTIONS
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****************************************************************************************
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*/
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#if (CTMR_USED)
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void CTMR_IRQHandler(void)
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{
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uint32_t iflg = CTMR->IFM.Word;
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if (iflg & TIMER_INT_CH1_BIT) // ch1 interrupt
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{
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GPIO_DAT_SET(1 << PA_RET_SEE1);
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CTMR->ICR.CC1I = 1;
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GPIO_DAT_CLR(1 << PA_RET_SEE1 | (1 << PA_SOFT_PWM));
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}
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if (iflg & TIMER_INT_CH2_BIT) // ch2 interrupt
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{
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GPIO_DAT_SET(1 << PA_RET_SEE2 | (1 << PA_SOFT_PWM));
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CTMR->ICR.CC2I = 1;
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GPIO_DAT_CLR(1 << PA_RET_SEE2);
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}
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}
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#else
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void ATMR_IRQHandler(void)
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{
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uint32_t iflg = ATMR->IFM.Word;
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if (iflg & TIMER_INT_CH1_BIT) // ch1 interrupt
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{
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GPIO_DAT_SET(1 << PA_RET_SEE1);
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ATMR->ICR.CC1I = 1;
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GPIO_DAT_CLR(1 << PA_RET_SEE1 | (1 << PA_SOFT_PWM));
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}
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if (iflg & TIMER_INT_CH2_BIT) // ch2 interrupt
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{
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GPIO_DAT_SET(1 << PA_RET_SEE2 | (1 << PA_SOFT_PWM));
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ATMR->ICR.CC2I = 1;
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GPIO_DAT_CLR(1 << PA_RET_SEE2);
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}
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}
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#endif
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static void pwcTest(void)
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{
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// init PADs
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GPIO_DAT_CLR((1 << PA_RET_SEE1) | (1 << PA_RET_SEE2) | (1 << PA_SOFT_PWM) | (1 << PA_PWC_CH1) | (1 << PA_PWC_CH2));
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GPIO_DIR_SET((1 << PA_RET_SEE1) | (1 << PA_RET_SEE2) | (1 << PA_SOFT_PWM));
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GPIO_DIR_CLR((1 << PA_PWC_CH1) | (1 << PA_PWC_CH2));
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iom_ctrl(PA_PWC_CH1, IOM_PULLDOWN | IOM_INPUT | IOM_SEL_TIMER);
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iom_ctrl(PA_PWC_CH2, IOM_PULLDOWN | IOM_INPUT | IOM_SEL_TIMER);
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// init pwm timer
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pwm_init(PWC_TMR, 0, UINT16_MAX);
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// pwc_chnl config
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pwm_chnl_cfg_t chnl_cfg;
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chnl_cfg.duty = 0;
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chnl_cfg.ccmr = PWC_CCMR_MODE(1, 3, PWC_PSC0);
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chnl_cfg.ccer = PWC_CCER_NEGEDGE;
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pwm_chnl_set(PWC_TMR_CH(1), &chnl_cfg);
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chnl_cfg.ccer = PWC_CCER_POSEDGE;
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pwm_chnl_set(PWC_TMR_CH(2), &chnl_cfg);
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// start with SMCR.TS=5(TI1FP1), SMCR.SMS=4(reset mode)
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pwm_conf(PWC_TMR, 0x54, TIMER_INT_CH1_BIT | TIMER_INT_CH2_BIT);
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pwm_start(PWC_TMR);
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// interrupt enable
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NVIC_EnableIRQ(PWC_IRQc);
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__enable_irq();
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}
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static void sysInit(void)
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{
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// Todo config, if need
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}
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static void devInit(void)
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{
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iwdt_disable();
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dbgInit();
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debug("PWC Test...\r\n");
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}
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int main(void)
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{
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sysInit();
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devInit();
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pwcTest();
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while (1);
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}
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